Patent Reveals AMD’s Hybrid Scheduler to Outpace Intel’s Efficiency Cores

As we all know, AMD is dominating the CPU market with its Ryzen 9000 series, but they are looking to take things further with some new tech. AMD has filed a new patent, which could potentially further increase its success in the CPU market.

The patent describes using a hybrid software and hardware scheduling system to make their CPUs more suitable for task handling.

This will change how AMD processor tasks are managed, and potentially improve power efficiency, responsiveness, and the overall performance of future AMD CPUs.

The patent outlines a system where both software and hardware work together and manage CPU workloads, increasing efficiency. According to AMD, the current scheduling only uses a single policy while managing work.

The design calls for processors with multiple types of cores (some with high performance, others optimized for power efficiency), alongside potential accelerator processors. When certain cores are underutilized or overloaded, tasks (threads) can be shifted among core types or to accelerators.

The described techniques reduce power consumption for the system while improving or maintaining system responsiveness in executing higher priority threads, as compared to conventional techniques that implement just one scheduling policy.

This patent focuses on core utilization. Usually, the OS uses quality of service (QoS) tags and hands over the demanding tasks to the fast and efficient, leaving low-priority tasks to energy-efficient cores.

This SMU (System Management Unit) will fix the power wastage when accelerators are being used, as it will monitor hardware in real time and dynamically override the software scheduler.

Unlike conventional techniques, the described techniques of hybrid scheduling for heterogeneous processor systems enable a hybrid approach for thread scheduling that dynamically switches between the first scheduling policy and the second scheduling policy.

This patent builds upon AMD’s previous explorations into hybrid core designs (similar to ARM/Intel big.LITTLE concepts), but adds a more active, hardware-assisted scheduling layer that reduces reliance on the OS alone.

By granting hardware a greater role in task allocation and scheduling policy, AMD aims to make thread transitions between core types smoother and more efficient.